sl-firmware
b0a5041261
Three bugs prevented mpu6000_is_calibrated() from returning true, blocking arming and balance mode: 1. WHO_AM_I single-attempt: one SPI glitch returning 0x00 caused icm42688_init() to return -128, skipping mpu6000_calibrate() entirely. Fix: retry WHO_AM_I up to 3 times with 10ms gaps. 2. icm42688_read() rx[15] uninitialized: if HAL_SPI_TransmitReceive() failed, garbage stack data was accumulated as gyro bias. Fix: zero- init rx[15] so failed transfers produce zero data. 3. mpu6000_calibrate() raw uninitialized: UB if icm42688_read() is a no-op (imu_type mismatch). Fix: zero-init raw each iteration. Also add SCB_InvalidateDCache_by_Addr() on SPI rx buffers in rreg() and icm42688_read() for DCache coherency. Currently a no-op (DCache is not enabled), but required if SCB_EnableDCache() is added — stack buffers in SRAM2 are in the cacheable memory region on STM32F7. Fix misleading DCache comment in icm42688.c (claimed DCache was disabled by main.c; actually SCB_EnableDCache() is never called). Build: 59904 bytes Flash (+512), 17100 bytes RAM — SUCCESS Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>