sl-firmware
f446e5766e
Adds STM32F7 STOP-mode power management with <10ms wake latency: - power_mgmt.c: state machine (ACTIVE→SLEEP_PENDING→SLEEPING→WAKING), 30s idle timeout (PM_IDLE_TIMEOUT_MS), 3s LED fade before STOP, gate SPI3/I2S3+SPI2+USART6+UART5 on sleep (clock-only, state preserved), EXTI1(PA1/CRSF)+EXTI7(PB7/JLink)+EXTI4(PC4/IMU) wake sources, PLL restore after STOP (PLLM=8/N=216/P=2 → 216MHz), uwTick save/restore - Peripheral gating: I2S3, SPI2(OSD), USART6, UART5 disabled during STOP; SPI1(IMU), UART4(CRSF), USART1(JLink), I2C1 remain active as wake sources - Sleep LED: triangle-wave pulse (2s period) on LED1 during SLEEP_PENDING, software PWM in main loop (1-bit, pm_pwm_phase vs brightness) - IWDG: fed just before WFI; <10ms wake << 50ms WATCHDOG_TIMEOUT_MS - JLink: JLINK_CMD_SLEEP=0x09, JLINK_TLM_POWER=0x81 (11-byte power frame at 1Hz: power_state, est_total_ma, est_audio_ma, est_osd_ma, idle_ms) - main.c: power_mgmt_init(), activity() on CRSF/JLink/armed, tick() when disarmed, sleep_req handler, LED PWM, JLINK_TLM_POWER telemetry - config.h: PM_* constants, PM_CURRENT_*_MA estimates, PM_TLM_HZ - test_power_mgmt.py: 72 tests passing (state machine, LED, gating, current estimates, JLink protocol, wake latency, hardware constants) Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>