2 Commits

Author	SHA1	Message	Date
sl-firmware	f59bc9931e	feat: CAN bus watchdog and error recovery (Issue #694) ... - CAN1_SCE_IRQHandler: detects bus-off/error-passive/error-warning from ESR - can_driver_watchdog_tick(): polls ESR each cycle, auto-restarts after CAN_WDOG_RESTART_MS (200ms) - can_wdog_t: tracks restart_count, busoff_count, errpassive_count, errwarn_count, tec, rec - JLink TLM code 0x8F (JLINK_TLM_CAN_WDOG) with jlink_send_can_wdog_tlm() - main.c: calls watchdog_tick() each loop, sends CAN wdog TLM at 1 Hz - TEST_HOST: inject_esr() stub + busoff_pending flag fixes t=0 sentinel ambiguity - test/test_can_watchdog.c: 23 unit tests, all pass Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>	2026-03-20 17:39:01 -04:00
sl-firmware	5e82878083	feat: bxCAN integration for VESC motor control and Orin comms (Issue #674) ... - can_driver: add filter bank 15 (all ext IDs → FIFO1) and widen bank 14 to accept all standard IDs; add can_driver_send_ext/std and ext/std frame callbacks (can_driver_set_ext_cb / can_driver_set_std_cb) - vesc_can: VESC 29-bit extended CAN protocol driver — send RPM to IDs 56 and 68 (FSESC 6.7 Pro Mini Dual), parse STATUS/STATUS_4/STATUS_5 big-endian payloads, alive timeout, JLINK_TLM_VESC_STATE at 1 Hz - orin_can: Orin↔FC standard CAN protocol — HEARTBEAT/DRIVE/MODE/ESTOP commands in, FC_STATUS + FC_VESC broadcast at 10 Hz - jlink: add JLINK_TLM_VESC_STATE (0x8E), jlink_tlm_vesc_state_t (22 bytes), jlink_send_vesc_state_tlm() - main: wire vesc_can_init/orin_can_init; replace can_driver_send_cmd with vesc_can_send_rpm; inject Orin CAN speed/steer into balance PID; add Orin CAN estop/clear handling; add orin_can_broadcast at 10 Hz - test: 56-test host-side suite for vesc_can; test/stubs/stm32f7xx_hal.h minimal HAL stub for all future host-side tests Safety: balance PID runs independently on Mamba — if Orin CAN link drops (orin_can_is_alive() == false) the robot continues balancing in-place. Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>	2026-03-17 21:41:19 -04:00