Prevents boot loop when ESP32 has no CAN transceiver connected.
CAN tasks only start if g_twai_bus_off is false after init.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
- gc9a01.c/h: GC9A01 240x240 round LCD SPI driver (SPI2, GPIO 9-14)
5x7 bitmap font with scaling, display_fill_rect/draw_string/draw_arc
- main.c: hud_task — "SAULT" orange header (scale=3) + battery voltage
white on black (scale=4), updates at 1 Hz from g_vesc[0].voltage_x10
- config.h: add DISP_* GPIO defines; revert 06219af UART regression —
lsusb on Orin confirms /dev/ttyACM0 = CH343 (1a86:55d3) wired to
GPIO 43/44, not native USB; UART must stay on 43/44, CAN stays on 2/1
(SN65HVD230 physical rewire to GPIO 2/1 still required for CAN to work)
- CMakeLists.txt: add gc9a01.c
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
UART0 init was claiming GPIO 43/44 before TWAI could use them for CAN.
Swapping init order ensures TWAI gets GPIO 43/44 (where the SN65HVD230
transceiver is physically wired per Waveshare board design).
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
- Define g_twai_bus_off in vesc_can.c, declare in vesc_can.h (was
referenced in main.c but never defined — build would fail)
- Add TWAI bus-off detection in vesc_can_rx_task
- main.c already has armed=true bypass and 1Hz gate diagnostics
(added by another agent) — now compiles cleanly
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Remove all OTA subsystem (gitea_ota, ota_self, uart_ota, ota_display)
and balance-bot safety checks (tilt cutoff, BAL_TILT_FAULT) so the
firmware builds without cJSON/WiFi/HTTP dependencies. Core UART protocol,
VESC CAN drive, differential steering, and PID tuning remain intact.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Extends the bd-66hx serial protocol with two new Orin→ESP32 commands:
CMD_OTA_CHECK (0x10): triggers gitea_ota_check_now(), responds with
TELEM_VERSION_INFO (0x84) for Balance and IO (current + available ver).
CMD_OTA_UPDATE (0x11): uint8 target (0=balance, 1=io, 2=both) — triggers
uart_ota_trigger() for IO or ota_self_trigger() for Balance.
NACK with ERR_OTA_BUSY or ERR_OTA_NO_UPDATE on failure.
New telemetry: TELEM_OTA_STATUS (0x83, target+state+progress+err),
TELEM_VERSION_INFO (0x84, target+current[16]+available[16]).
Wires OTA stack into app_main: ota_self_health_check on boot,
gitea_ota_init + ota_display_init after peripherals ready.
CMakeLists updated with all OTA component dependencies.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
Replaces Orin↔ESP32-S3 BALANCE CAN comms (0x300-0x303 / 0x400-0x401)
with binary serial framing over CH343 USB-CDC at 460800 baud.
Protocol matches bd-wim1 (sl-perception) exactly:
Frame: [0xAA][LEN][TYPE][PAYLOAD][CRC8-SMBUS]
CRC covers LEN+TYPE+PAYLOAD, big-endian multi-byte fields.
Commands (Orin→ESP32): HEARTBEAT/DRIVE/ESTOP/ARM/PID
Telemetry (ESP32→Orin): TELEM_STATUS, TELEM_VESC_LEFT (ID 56),
TELEM_VESC_RIGHT (ID 68), ACK/NACK
VESC CAN TWAI kept for motor control; drive commands from Orin
forwarded to VESCs via SET_RPM. Hardware note: SN65HVD230
rewired from IO43/44 to IO2/IO1 to free IO43/44 for CH343.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
