sl-firmware
f600aa98e7
- CAN1_SCE_IRQHandler: detects bus-off/error-passive/error-warning from ESR - can_driver_watchdog_tick(): polls ESR each cycle, auto-restarts after CAN_WDOG_RESTART_MS (200ms) - can_wdog_t: tracks restart_count, busoff_count, errpassive_count, errwarn_count, tec, rec - JLink TLM code 0x8F (JLINK_TLM_CAN_WDOG) with jlink_send_can_wdog_tlm() - main.c: calls watchdog_tick() each loop, sends CAN wdog TLM at 1 Hz - TEST_HOST: inject_esr() stub + busoff_pending flag fixes t=0 sentinel ambiguity - test/test_can_watchdog.c: 23 unit tests, all pass Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
102 lines
4.9 KiB
C
102 lines
4.9 KiB
C
/* test/stubs/stm32f7xx_hal.h - minimal HAL stub for host-side unit tests. */
|
|
#ifndef STM32F7XX_HAL_H
|
|
#define STM32F7XX_HAL_H
|
|
#include <stdint.h>
|
|
#include <stdbool.h>
|
|
#include <stddef.h>
|
|
#define HAL_OK 0
|
|
#define HAL_ERROR 1
|
|
#define HAL_BUSY 2
|
|
#define HAL_TIMEOUT 3
|
|
typedef uint32_t HAL_StatusTypeDef;
|
|
#define ENABLE 1
|
|
#define DISABLE 0
|
|
uint32_t HAL_GetTick(void);
|
|
typedef struct { uint32_t dummy; uint32_t ESR; } CAN_TypeDef;
|
|
typedef struct {
|
|
uint32_t Prescaler; uint32_t Mode; uint32_t SyncJumpWidth;
|
|
uint32_t TimeSeg1; uint32_t TimeSeg2; uint32_t TimeTriggeredMode;
|
|
uint32_t AutoBusOff; uint32_t AutoWakeUp; uint32_t AutoRetransmission;
|
|
uint32_t ReceiveFifoLocked; uint32_t TransmitFifoPriority;
|
|
} CAN_InitTypeDef;
|
|
typedef struct { CAN_TypeDef *Instance; CAN_InitTypeDef Init; } CAN_HandleTypeDef;
|
|
typedef struct {
|
|
uint32_t StdId; uint32_t ExtId; uint32_t IDE; uint32_t RTR;
|
|
uint32_t DLC; uint32_t Timestamp; uint32_t FilterMatchIndex;
|
|
} CAN_RxHeaderTypeDef;
|
|
typedef struct {
|
|
uint32_t StdId; uint32_t ExtId; uint32_t IDE; uint32_t RTR;
|
|
uint32_t DLC; uint32_t TransmitGlobalTime;
|
|
} CAN_TxHeaderTypeDef;
|
|
typedef struct {
|
|
uint32_t FilterIdHigh; uint32_t FilterIdLow;
|
|
uint32_t FilterMaskIdHigh; uint32_t FilterMaskIdLow;
|
|
uint32_t FilterFIFOAssignment; uint32_t FilterBank;
|
|
uint32_t FilterMode; uint32_t FilterScale;
|
|
uint32_t FilterActivation; uint32_t SlaveStartFilterBank;
|
|
} CAN_FilterTypeDef;
|
|
#define CAN_ID_STD 0x00000000u
|
|
#define CAN_ID_EXT 0x00000004u
|
|
#define CAN_RTR_DATA 0x00000000u
|
|
#define CAN_RTR_REMOTE 0x00000002u
|
|
#define CAN_FILTERMODE_IDMASK 0u
|
|
#define CAN_FILTERSCALE_32BIT 1u
|
|
#define CAN_RX_FIFO0 0u
|
|
#define CAN_RX_FIFO1 1u
|
|
#define CAN_FILTER_ENABLE 1u
|
|
#define CAN_MODE_NORMAL 0u
|
|
#define CAN_SJW_1TQ 0u
|
|
#define CAN_BS1_13TQ 0u
|
|
#define CAN_BS2_4TQ 0u
|
|
#define CAN_ESR_EWGF 0x00000001u
|
|
#define CAN_ESR_EPVF 0x00000002u
|
|
#define CAN_ESR_BOFF 0x00000004u
|
|
#define CAN_ESR_TEC_Pos 16u
|
|
#define CAN_ESR_REC_Pos 24u
|
|
#define CAN_IT_ERROR_WARNING 0x00000100u
|
|
#define CAN_IT_ERROR_PASSIVE 0x00000200u
|
|
#define CAN_IT_BUSOFF 0x00000400u
|
|
#define CAN_FLAG_ERRI 0x00060000u
|
|
typedef uint32_t IRQn_Type;
|
|
#define CAN1_SCE_IRQn ((IRQn_Type)22u)
|
|
static inline void HAL_NVIC_SetPriority(IRQn_Type i,uint32_t p,uint32_t s){(void)i;(void)p;(void)s;}
|
|
static inline void HAL_NVIC_EnableIRQ(IRQn_Type i){(void)i;}
|
|
#define CAN1 ((CAN_TypeDef *)0)
|
|
static inline HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *h){(void)h;return HAL_OK;}
|
|
static inline HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *h,CAN_FilterTypeDef *f){(void)h;(void)f;return HAL_OK;}
|
|
static inline HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *h){(void)h;return HAL_OK;}
|
|
static inline HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *h){(void)h;return HAL_OK;}
|
|
static inline HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *h,uint32_t it){(void)h;(void)it;return HAL_OK;}
|
|
static inline void HAL_CAN_IRQHandler(CAN_HandleTypeDef *h){(void)h;}
|
|
static inline uint32_t HAL_CAN_GetTxMailboxesFreeLevel(CAN_HandleTypeDef *h){(void)h;return 3u;}
|
|
static inline HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *h,CAN_TxHeaderTypeDef *hdr,uint8_t *d,uint32_t *mb){(void)h;(void)hdr;(void)d;(void)mb;return HAL_OK;}
|
|
static inline uint32_t HAL_CAN_GetRxFifoFillLevel(CAN_HandleTypeDef *h,uint32_t f){(void)h;(void)f;return 0u;}
|
|
static inline HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *h,uint32_t f,CAN_RxHeaderTypeDef *hdr,uint8_t *d){(void)h;(void)f;(void)hdr;(void)d;return HAL_OK;}
|
|
#define __HAL_CAN_CLEAR_FLAG(h,f) ((void)(h),(void)(f))
|
|
typedef struct { uint32_t dummy; } GPIO_TypeDef;
|
|
typedef struct { uint32_t Pin; uint32_t Mode; uint32_t Pull; uint32_t Speed; uint32_t Alternate; } GPIO_InitTypeDef;
|
|
typedef uint32_t GPIO_PinState;
|
|
#define GPIO_PIN_RESET 0u
|
|
#define GPIO_PIN_SET 1u
|
|
static inline void HAL_GPIO_Init(GPIO_TypeDef *p,GPIO_InitTypeDef *g){(void)p;(void)g;}
|
|
static inline GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *p,uint32_t pin){(void)p;(void)pin;return GPIO_PIN_SET;}
|
|
#define GPIOB ((GPIO_TypeDef *)0)
|
|
#define GPIOC ((GPIO_TypeDef *)0)
|
|
#define GPIO_PIN_2 (1u<<2)
|
|
#define GPIO_PIN_8 (1u<<8)
|
|
#define GPIO_PIN_9 (1u<<9)
|
|
#define GPIO_PIN_12 (1u<<12)
|
|
#define GPIO_PIN_13 (1u<<13)
|
|
#define GPIO_MODE_AF_PP 0u
|
|
#define GPIO_MODE_INPUT 1u
|
|
#define GPIO_NOPULL 0u
|
|
#define GPIO_PULLUP 1u
|
|
#define GPIO_SPEED_FREQ_HIGH 0u
|
|
#define GPIO_AF9_CAN1 9u
|
|
#define GPIO_AF9_CAN2 9u
|
|
#define __HAL_RCC_CAN1_CLK_ENABLE() ((void)0)
|
|
#define __HAL_RCC_CAN2_CLK_ENABLE() ((void)0)
|
|
#define __HAL_RCC_GPIOB_CLK_ENABLE() ((void)0)
|
|
#define __HAL_RCC_GPIOC_CLK_ENABLE() ((void)0)
|
|
#endif /* STM32F7XX_HAL_H */
|