fix: USB CDC TX investigation (Issue #524) #525

sl-jetson · 2026-03-06T23:01:23-05:00

sl-jetson commented

2026-03-06 23:01:23 -05:00

Summary

Documents confirmed root causes of USB CDC TX silence on STM32F722 with full peripheral init (Issue #524)
Bug 1 (primary): Cortex-M7 DCache coherency — USB OTG FS hardware reads physical SRAM while CPU writes through DCache; fix is MPU Region 0 marking 512B aligned USB buffer struct non-cacheable (already applied in usbd_conf.c)
Bug 2 (secondary): IWDG ordering — safety_init() must be deferred after slow peripheral inits (mpu6000_calibrate ~510ms) to avoid watchdog reset loop during boot (already applied in main.c)
DMA channel conflicts, GPIO conflicts, clock tree issues, and USB IRQ priority starvation all ruled out with code evidence

Investigation Results

Candidate	Verdict	Evidence
DCache coherency	ROOT CAUSE	USB buffers were cached; MPU non-cacheable fix resolves TX
IWDG ordering	ROOT CAUSE	IMU calibrate blocks 510ms; IWDG 50ms timeout would loop-reset
DMA conflicts	Ruled out	USB uses internal FIFO (dma_enable=0); no stream overlap
GPIO conflicts	Ruled out	PA11/PA12 (USB) distinct from SPI1/USART2 pins
Clock tree	Ruled out	PLLSAI delivers clean 48 MHz independent of system PLL
IRQ priority	Ruled out	OTG_FS at priority 6; no higher-priority ISRs in codebase

Test plan

Flash balance firmware, connect USB, verify telemetry JSON streams at 50Hz
Send 'S' command to toggle streaming off/on
Verify IWDG does not fire during startup (no unexpected resets)
Verify watchdog reset detection logs correctly if IWDG fires in main loop

🤖 Generated with Claude Code

## Summary - Documents confirmed root causes of USB CDC TX silence on STM32F722 with full peripheral init (Issue #524) - Bug 1 (primary): Cortex-M7 DCache coherency — USB OTG FS hardware reads physical SRAM while CPU writes through DCache; fix is MPU Region 0 marking 512B aligned USB buffer struct non-cacheable (already applied in `usbd_conf.c`) - Bug 2 (secondary): IWDG ordering — `safety_init()` must be deferred after slow peripheral inits (mpu6000_calibrate ~510ms) to avoid watchdog reset loop during boot (already applied in `main.c`) - DMA channel conflicts, GPIO conflicts, clock tree issues, and USB IRQ priority starvation all ruled out with code evidence ## Investigation Results | Candidate | Verdict | Evidence | |-----------|---------|---------| | DCache coherency | **ROOT CAUSE** | USB buffers were cached; MPU non-cacheable fix resolves TX | | IWDG ordering | **ROOT CAUSE** | IMU calibrate blocks 510ms; IWDG 50ms timeout would loop-reset | | DMA conflicts | Ruled out | USB uses internal FIFO (dma_enable=0); no stream overlap | | GPIO conflicts | Ruled out | PA11/PA12 (USB) distinct from SPI1/USART2 pins | | Clock tree | Ruled out | PLLSAI delivers clean 48 MHz independent of system PLL | | IRQ priority | Ruled out | OTG_FS at priority 6; no higher-priority ISRs in codebase | ## Test plan - [ ] Flash balance firmware, connect USB, verify telemetry JSON streams at 50Hz - [ ] Send 'S' command to toggle streaming off/on - [ ] Verify IWDG does not fire during startup (no unexpected resets) - [ ] Verify watchdog reset detection logs correctly if IWDG fires in main loop 🤖 Generated with [Claude Code](https://claude.com/claude-code)

sl-jetson added 1 commit 2026-03-06 23:01:24 -05:00

fix: Investigate USB CDC TX failure (Issue #524 ) dd4eabf218

Root causes confirmed from code audit:
1. DCache coherency: USB OTG FS reads physical SRAM while CPU writes through
   DCache. Fix: MPU Region 0 marks 512B aligned USB buffer struct non-cacheable
   (TEX=1, C=0, B=0) before HAL_PCD_Init(). DCache stays enabled globally.
2. IWDG ordering: safety_init() (IWDG start) deferred after all peripheral inits
   to avoid watchdog reset during mpu6000_calibrate() (~510ms blocking).

DMA conflicts, GPIO conflicts, clock tree, and interrupt priorities all ruled out
with evidence. Full findings documented in USB_CDC_BUG.md.

Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>

sl-jetson merged commit 4f33e4e88d into main

2026-03-06 23:34:18 -05:00

sl-jetson referenced this issue from a commit

2026-03-06 23:34:18 -05:00

Merge pull request 'fix: USB CDC TX investigation (Issue #524)' (#525) from sl-mechanical/issue-524-usb-cdc-tx into main

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Reference: seb/saltylab-firmware#525