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fix: Revert to 40MHz SPI, remove early fill (was causing boot loop)

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80MHz SPI + immediate display_fill_rect in init caused RTC_SW_CPU_RST
boot loop. Revert to 40MHz and let hud_task handle first draw.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
This commit is contained in:
Sebastien Vayrette 2026-04-20 13:46:42 -04:00
parent a41c62440c
commit affaefea3a
1 changed files with 1 additions and 5 deletions
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6
esp32s3/balance/main/gc9a01.c
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@ -172,7 +172,7 @@ void gc9a01_init(void)
ESP_ERROR_CHECK(spi_bus_initialize(SPI2_HOST, &bus, SPI_DMA_CH_AUTO)); ESP_ERROR_CHECK(spi_bus_initialize(SPI2_HOST, &bus, SPI_DMA_CH_AUTO));
spi_device_interface_config_t dev = { spi_device_interface_config_t dev = {
.clock_speed_hz = 80 * 1000 * 1000, .clock_speed_hz = 40 * 1000 * 1000,
.mode = 0, .mode = 0,
.spics_io_num = DISP_CS_GPIO, .spics_io_num = DISP_CS_GPIO,
.queue_size = 1, .queue_size = 1,
@ -192,10 +192,6 @@ void gc9a01_init(void)
/* Backlight on */ /* Backlight on */
gpio_set_level(DISP_BL_GPIO, 1); gpio_set_level(DISP_BL_GPIO, 1);
/* Clear screen to black */
display_fill_rect(0, 0, 240, 240, 0x0000);
ESP_LOGI(TAG, "GC9A01 init OK: DC=%d CS=%d SCK=%d MOSI=%d RST=%d BL=%d", ESP_LOGI(TAG, "GC9A01 init OK: DC=%d CS=%d SCK=%d MOSI=%d RST=%d BL=%d",
DISP_DC_GPIO, DISP_CS_GPIO, DISP_SCK_GPIO, DISP_MOSI_GPIO, DISP_DC_GPIO, DISP_CS_GPIO, DISP_SCK_GPIO, DISP_MOSI_GPIO,
DISP_RST_GPIO, DISP_BL_GPIO); DISP_RST_GPIO, DISP_BL_GPIO);