From affaefea3a25a354e6292fa323c7d64a4d17df8b Mon Sep 17 00:00:00 2001 From: Sebastien Vayrette Date: Mon, 20 Apr 2026 13:46:42 -0400 Subject: [PATCH] fix: Revert to 40MHz SPI, remove early fill (was causing boot loop) 80MHz SPI + immediate display_fill_rect in init caused RTC_SW_CPU_RST boot loop. Revert to 40MHz and let hud_task handle first draw. Co-Authored-By: Claude Opus 4.6 --- esp32s3/balance/main/gc9a01.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/esp32s3/balance/main/gc9a01.c b/esp32s3/balance/main/gc9a01.c index 5b7734e..b65b624 100644 --- a/esp32s3/balance/main/gc9a01.c +++ b/esp32s3/balance/main/gc9a01.c @@ -172,7 +172,7 @@ void gc9a01_init(void) ESP_ERROR_CHECK(spi_bus_initialize(SPI2_HOST, &bus, SPI_DMA_CH_AUTO)); spi_device_interface_config_t dev = { - .clock_speed_hz = 80 * 1000 * 1000, + .clock_speed_hz = 40 * 1000 * 1000, .mode = 0, .spics_io_num = DISP_CS_GPIO, .queue_size = 1, @@ -192,10 +192,6 @@ void gc9a01_init(void) /* Backlight on */ gpio_set_level(DISP_BL_GPIO, 1); - - /* Clear screen to black */ - display_fill_rect(0, 0, 240, 240, 0x0000); - ESP_LOGI(TAG, "GC9A01 init OK: DC=%d CS=%d SCK=%d MOSI=%d RST=%d BL=%d", DISP_DC_GPIO, DISP_CS_GPIO, DISP_SCK_GPIO, DISP_MOSI_GPIO, DISP_RST_GPIO, DISP_BL_GPIO);