sl-controls
f4e71777ec
Fixed 7 compile errors across 6 files: 1. servo.c: Removed duplicate ServoState typedef, updated struct definition in header 2. watchdog.c: Fixed IWDG handle usage - moved to global scope for IRQHandler access 3. ultrasonic.c: Fixed timer handle type mismatches - use TIM_HandleTypeDef instead of TIM_TypeDef, replaced HAL_TIM_IC_Init_Compat with proper HAL functions 4. main.c: Replaced undefined functions - imu_calibrated() → mpu6000_is_calibrated(), crsf_is_active() → manual state check 5. ina219.c: Stubbed I2C functions pending HAL implementation Build now passes with ZERO errors. - RAM: 6.5% (16964 bytes / 262144) - Flash: 10.6% (55368 bytes / 524288) Co-Authored-By: Claude Haiku 4.5 <noreply@anthropic.com>
149 lines
4.5 KiB
C
149 lines
4.5 KiB
C
#include "watchdog.h"
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#include "stm32f7xx_hal.h"
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#include <string.h>
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/* ================================================================
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* IWDG Hardware Configuration
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* ================================================================ */
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/* LSI frequency: approximately 32 kHz (typical, 20-40 kHz) */
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#define LSI_FREQUENCY_HZ 32000
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/* IWDG prescaler values */
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#define IWDG_PSC_4 0 /* Divider = 4 */
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#define IWDG_PSC_8 1 /* Divider = 8 */
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#define IWDG_PSC_16 2 /* Divider = 16 */
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#define IWDG_PSC_32 3 /* Divider = 32 */
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#define IWDG_PSC_64 4 /* Divider = 64 */
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#define IWDG_PSC_128 5 /* Divider = 128 */
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#define IWDG_PSC_256 6 /* Divider = 256 */
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/* Reload register range: 0-4095 */
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#define IWDG_RELOAD_MIN 1
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#define IWDG_RELOAD_MAX 4095
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/* ================================================================
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* Watchdog State
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* ================================================================ */
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typedef struct {
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bool is_initialized; /* Whether watchdog has been initialized */
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bool is_running; /* Whether watchdog is currently active */
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uint32_t timeout_ms; /* Configured timeout in milliseconds */
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uint8_t prescaler; /* IWDG prescaler value */
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uint16_t reload_value; /* IWDG reload register value */
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} WatchdogState;
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static WatchdogState s_watchdog = {
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.is_initialized = false,
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.is_running = false,
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.timeout_ms = 0,
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.prescaler = IWDG_PSC_32,
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.reload_value = 0
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};
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static IWDG_HandleTypeDef s_iwdg_handle = {0};
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/* ================================================================
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* Helper Functions
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* ================================================================ */
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/* Calculate prescaler and reload values for desired timeout */
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static bool watchdog_calculate_config(uint32_t timeout_ms,
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uint8_t *out_prescaler,
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uint16_t *out_reload)
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{
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if (timeout_ms < 1 || timeout_ms > 32000) {
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return false; /* Out of reasonable range */
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}
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/* Try prescalers from smallest to largest */
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const uint8_t prescalers[] = {IWDG_PSC_4, IWDG_PSC_8, IWDG_PSC_16,
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IWDG_PSC_32, IWDG_PSC_64, IWDG_PSC_128,
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IWDG_PSC_256};
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const uint16_t dividers[] = {4, 8, 16, 32, 64, 128, 256};
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for (int i = 0; i < 7; i++) {
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uint16_t divider = dividers[i];
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/* timeout_ms = (reload * divider * 1000) / LSI_FREQUENCY_HZ */
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uint32_t reload = (timeout_ms * LSI_FREQUENCY_HZ) / (divider * 1000);
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if (reload >= IWDG_RELOAD_MIN && reload <= IWDG_RELOAD_MAX) {
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*out_prescaler = prescalers[i];
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*out_reload = (uint16_t)reload;
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return true;
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}
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}
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return false; /* No suitable prescaler found */
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}
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/* ================================================================
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* Public API
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* ================================================================ */
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bool watchdog_init(uint32_t timeout_ms)
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{
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if (s_watchdog.is_initialized) {
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return false; /* Already initialized */
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}
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/* Validate and calculate prescaler/reload values */
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uint8_t prescaler;
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uint16_t reload;
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if (!watchdog_calculate_config(timeout_ms, &prescaler, &reload)) {
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return false;
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}
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s_watchdog.prescaler = prescaler;
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s_watchdog.reload_value = reload;
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s_watchdog.timeout_ms = timeout_ms;
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/* Configure and start IWDG */
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s_iwdg_handle.Instance = IWDG;
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s_iwdg_handle.Init.Prescaler = prescaler;
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s_iwdg_handle.Init.Reload = reload;
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s_iwdg_handle.Init.Window = reload; /* Window == Reload means full timeout */
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HAL_IWDG_Init(&s_iwdg_handle);
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s_watchdog.is_initialized = true;
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s_watchdog.is_running = true;
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return true;
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}
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void watchdog_kick(void)
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{
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if (s_watchdog.is_running) {
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HAL_IWDG_Refresh(&s_iwdg_handle); /* Reset IWDG counter */
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}
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}
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uint32_t watchdog_get_timeout(void)
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{
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return s_watchdog.timeout_ms;
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}
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bool watchdog_is_running(void)
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{
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return s_watchdog.is_running;
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}
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bool watchdog_was_reset_by_watchdog(void)
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{
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/* Check RCC reset source flags */
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/* IWDG reset sets the IWDGRSTF flag in RCC_CSR */
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uint32_t reset_flags = RCC->CSR;
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/* IWDGRSTF is bit 29 of RCC_CSR */
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bool was_iwdg_reset = (reset_flags & RCC_CSR_IWDGRSTF) != 0;
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/* Clear the flag by writing to RMVF (Bit 24) */
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if (was_iwdg_reset) {
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RCC->CSR |= RCC_CSR_RMVF; /* Clear reset flags */
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}
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return was_iwdg_reset;
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}
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