sl-firmware
b830420efc
Replaces Orin↔ESP32-S3 BALANCE CAN comms (0x300-0x303 / 0x400-0x401)
with binary serial framing over CH343 USB-CDC at 460800 baud.
Protocol matches bd-wim1 (sl-perception) exactly:
Frame: [0xAA][LEN][TYPE][PAYLOAD][CRC8-SMBUS]
CRC covers LEN+TYPE+PAYLOAD, big-endian multi-byte fields.
Commands (Orin→ESP32): HEARTBEAT/DRIVE/ESTOP/ARM/PID
Telemetry (ESP32→Orin): TELEM_STATUS, TELEM_VESC_LEFT (ID 56),
TELEM_VESC_RIGHT (ID 68), ACK/NACK
VESC CAN TWAI kept for motor control; drive commands from Orin
forwarded to VESCs via SET_RPM. Hardware note: SN65HVD230
rewired from IO43/44 to IO2/IO1 to free IO43/44 for CH343.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
95 lines
3.2 KiB
C
95 lines
3.2 KiB
C
#pragma once
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/* orin_serial.h — Orin↔ESP32-S3 BALANCE USB/UART serial protocol (bd-66hx)
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*
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* Frame layout (matches bd-wim1 esp32_balance_protocol.py exactly):
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* [0xAA][LEN][TYPE][PAYLOAD × LEN bytes][CRC8-SMBUS]
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* CRC covers LEN + TYPE + PAYLOAD bytes.
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* All multi-byte payload fields are big-endian.
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*
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* Physical: UART0 → CH343 USB-serial → Orin /dev/esp32-balance @ 460800 baud
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*/
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#include <stdint.h>
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#include <stdbool.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/queue.h"
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/* ── Frame constants ── */
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#define ORIN_SYNC 0xAAu
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#define ORIN_MAX_PAYLOAD 62u
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/* ── Command types: Orin → ESP32 ── */
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#define CMD_HEARTBEAT 0x01u
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#define CMD_DRIVE 0x02u /* int16 speed + int16 steer, BE */
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#define CMD_ESTOP 0x03u /* uint8: 1=assert, 0=clear */
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#define CMD_ARM 0x04u /* uint8: 1=arm, 0=disarm */
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#define CMD_PID 0x05u /* float32 kp, ki, kd, BE */
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/* ── Telemetry types: ESP32 → Orin ── */
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#define TELEM_STATUS 0x80u /* status @ 10 Hz */
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#define TELEM_VESC_LEFT 0x81u /* VESC ID 56 telemetry @ 10 Hz */
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#define TELEM_VESC_RIGHT 0x82u /* VESC ID 68 telemetry @ 10 Hz */
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#define RESP_ACK 0xA0u
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#define RESP_NACK 0xA1u
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/* ── NACK error codes ── */
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#define ERR_BAD_CRC 0x01u
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#define ERR_BAD_LEN 0x02u
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#define ERR_ESTOP_ACTIVE 0x03u
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#define ERR_DISARMED 0x04u
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/* ── Balance state (mirrored from TELEM_STATUS.balance_state) ── */
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typedef enum {
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BAL_DISARMED = 0,
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BAL_ARMED = 1,
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BAL_TILT_FAULT = 2,
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BAL_ESTOP = 3,
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} bal_state_t;
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/* ── Shared state written by RX task, consumed by main/vesc tasks ── */
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typedef struct {
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volatile int16_t speed; /* -1000..+1000 */
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volatile int16_t steer; /* -1000..+1000 */
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volatile uint32_t updated_ms; /* esp_timer tick at last CMD_DRIVE */
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} orin_drive_t;
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typedef struct {
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volatile float kp, ki, kd;
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volatile bool updated;
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} orin_pid_t;
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typedef struct {
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volatile bool armed;
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volatile bool estop;
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volatile uint32_t hb_last_ms; /* esp_timer tick at last CMD_HEARTBEAT/CMD_DRIVE */
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} orin_control_t;
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/* ── TX frame queue item ── */
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typedef struct {
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uint8_t type;
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uint8_t len;
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uint8_t payload[ORIN_MAX_PAYLOAD];
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} orin_tx_frame_t;
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/* ── Globals (defined in orin_serial.c, extern here) ── */
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extern orin_drive_t g_orin_drive;
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extern orin_pid_t g_orin_pid;
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extern orin_control_t g_orin_ctrl;
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/* ── API ── */
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void orin_serial_init(void);
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/* Tasks — pass tx_queue as arg to both */
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void orin_serial_rx_task(void *arg); /* arg = QueueHandle_t tx_queue */
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void orin_serial_tx_task(void *arg); /* arg = QueueHandle_t tx_queue */
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/* Enqueue outbound frames */
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void orin_send_status(QueueHandle_t q,
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int16_t pitch_x10, int16_t motor_cmd,
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uint16_t vbat_mv, bal_state_t state, uint8_t flags);
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void orin_send_vesc(QueueHandle_t q, uint8_t telem_type,
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int32_t erpm, uint16_t voltage_mv,
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int16_t current_ma, uint16_t temp_c_x10);
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void orin_send_ack(QueueHandle_t q, uint8_t cmd_type);
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void orin_send_nack(QueueHandle_t q, uint8_t cmd_type, uint8_t err);
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