- gc9a01.c/h: GC9A01 240x240 round LCD SPI driver (SPI2, GPIO 9-14) 5x7 bitmap font with scaling, display_fill_rect/draw_string/draw_arc - main.c: hud_task — "SAULT" orange header (scale=3) + battery voltage white on black (scale=4), updates at 1 Hz from g_vesc[0].voltage_x10 - config.h: add DISP_* GPIO defines; revert 06219af UART regression — lsusb on Orin confirms /dev/ttyACM0 = CH343 (1a86:55d3) wired to GPIO 43/44, not native USB; UART must stay on 43/44, CAN stays on 2/1 (SN65HVD230 physical rewire to GPIO 2/1 still required for CAN to work) - CMakeLists.txt: add gc9a01.c Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
59 lines
2.7 KiB
C
59 lines
2.7 KiB
C
#pragma once
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/* ── ESP32-S3 BALANCE board — bd-66hx pin/config definitions ───────────────
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*
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* Hardware change from pre-bd-66hx design:
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* Previously: IO43/IO44 = CAN SN65HVD230 (shared Orin+VESC bus via CANable2)
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* After bd-66hx: IO43/IO44 = CH343 UART0 (Orin serial comms)
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* IO2/IO1 = CAN SN65HVD230 rewired (VESC-only bus)
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*
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* The SN65HVD230 transceiver physical wiring must be updated from IO43/44
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* to IO2/IO1 when deploying this firmware. See docs/SAUL-TEE-SYSTEM-REFERENCE.md.
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*/
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/* ── Orin serial: CH343 USB-UART bridge (1a86:55d3 = /dev/ttyACM0 on Orin) ──
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* Physical path: Orin USB → CH343 → GPIO 43 (TX) / GPIO 44 (RX).
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* NOTE: lsusb on Orin shows ONLY CH343, not ESP32 native USB (303a:xxxx).
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* USB Serial/JTAG is console-only — it is not the Orin↔ESP32 data path.
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*/
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#define ORIN_UART_PORT UART_NUM_0
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#define ORIN_UART_BAUD 460800
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#define ORIN_UART_TX_GPIO 43 /* ESP32 → CH343 RXD */
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#define ORIN_UART_RX_GPIO 44 /* CH343 TXD → ESP32 */
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#define ORIN_UART_RX_BUF 1024
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#define ORIN_TX_QUEUE_DEPTH 16
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/* ── VESC CAN TWAI (SN65HVD230 target GPIO 2/1 per bd-66hx design) ──
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* HARDWARE NOTE: SN65HVD230 transceiver must be physically wired to GPIO 2
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* (TXD) and GPIO 1 (RXD). Old prototype wiring used GPIO 43/44 but those
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* pins are now committed to UART (CH343). Rewire required before CAN works.
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*/
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#define VESC_CAN_TX_GPIO 2 /* ESP32 TWAI TX → SN65HVD230 TXD */
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#define VESC_CAN_RX_GPIO 1 /* SN65HVD230 RXD → ESP32 TWAI RX */
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#define VESC_CAN_RX_QUEUE 32
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/* VESC node IDs — matched to bd-wim1 TELEM_VESC_LEFT/RIGHT mapping */
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#define VESC_ID_A 56u /* TELEM_VESC_LEFT (0x81) */
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#define VESC_ID_B 68u /* TELEM_VESC_RIGHT (0x82) */
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/* ── GC9A01 240×240 round display (bd-1yr8, SPI2) ── */
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#define DISP_CS_GPIO 12
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#define DISP_DC_GPIO 11
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#define DISP_RST_GPIO 10
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#define DISP_BL_GPIO 9
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#define DISP_MOSI_GPIO 13
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#define DISP_SCK_GPIO 14
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/* ── Safety / timing ── */
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#define HB_TIMEOUT_MS 500u /* heartbeat watchdog: disarm if exceeded */
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#define DRIVE_TIMEOUT_MS 500u /* drive command staleness timeout */
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#define TELEM_STATUS_PERIOD_MS 100u /* 10 Hz status telemetry to Orin */
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#define TELEM_VESC_PERIOD_MS 100u /* 10 Hz VESC telemetry to Orin */
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/* ── Drive → VESC RPM scaling ── */
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#define RPM_PER_SPEED_UNIT 5 /* speed_units=1000 → 5000 ERPM */
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#define RPM_PER_STEER_UNIT 3 /* steer differential scale */
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/* ── Tilt cutoff ── */
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#define TILT_CUTOFF_DEG 25.0f
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