sl-firmware
81d76e4770
Root cause 1 (IWDG reset loop): safety_init() was called before mpu6000_init() — IWDG 50ms timeout fires during ~510ms IMU init, causing infinite MCU reset. Moved safety_init() to after all peripheral inits (IMU, hoverboard, balance). Root cause 2 (DCache coherency): USB TX/RX buffers merged into a single 512B-aligned struct in usbd_cdc_if.c. MPU Region 0 configured non-cacheable (TEX=1, C=0, B=0) in usbd_conf.c USBD_LL_Init() before HAL_PCD_Init(). DCache stays ON globally — MPU handles coherency. Removed SCB_DisableDCache() from main.c (caused boot crash). Also: fix safety.c IWDG_RELOAD macro (float literals not valid in #if); add crsf.c stub so crsf_state links (UART not yet wired). Fixes issue #9. Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
20 lines
597 B
C
20 lines
597 B
C
/*
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* crsf.c — CRSF RC receiver stub (UART not yet wired on MAMBA F722S).
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* crsf_state.last_rx_ms stays 0 so safety_rc_alive() always returns false,
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* which keeps USB-only mode active (RC timeout disarm is commented out in main.c).
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*/
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#include "crsf.h"
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volatile CRSFState crsf_state = {0};
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void crsf_init(void) {}
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void crsf_parse_byte(uint8_t byte) { (void)byte; }
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int16_t crsf_to_range(uint16_t val, int16_t min, int16_t max)
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{
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/* CRSF range 172-1811 → linear map to [min, max] */
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int32_t v = (int32_t)val;
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return (int16_t)(min + (v - 172) * (max - min) / (1811 - 172));
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}
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