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257d6ccf26
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909763494f
@ -16,21 +16,8 @@ volatile uint8_t cdc_disarm_request = 0; /* set by D command */
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volatile uint8_t cdc_cmd_ready = 0;
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volatile uint8_t cdc_cmd_ready = 0;
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volatile char cdc_cmd_buf[32];
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volatile char cdc_cmd_buf[32];
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/*
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static uint8_t UserRxBuffer[256];
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* USB TX/RX buffers grouped into a single 512-byte aligned struct so that
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static uint8_t UserTxBuffer[256];
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* one MPU region (configured in usbd_conf.c) can mark them non-cacheable.
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* Size must be a power-of-2 >= total size for MPU RASR SIZE encoding.
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*/
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static struct {
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uint8_t tx[256];
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uint8_t rx[256];
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} __attribute__((aligned(512))) usb_nc_buf;
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#define UserTxBuffer usb_nc_buf.tx
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#define UserRxBuffer usb_nc_buf.rx
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/* Exported so usbd_conf.c USB_NC_MPU_Config() can set the region base */
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void * const usb_nc_buf_base = &usb_nc_buf;
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/*
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/*
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* Betaflight-proven DFU reboot:
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* Betaflight-proven DFU reboot:
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@ -5,33 +5,6 @@
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#include "usbd_cdc.h"
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#include "usbd_cdc.h"
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#include "usbd_conf.h"
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#include "usbd_conf.h"
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/*
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* Mark USB TX/RX buffers non-cacheable via MPU Region 0.
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* Cortex-M7 TEX=1, C=0, B=0 → Normal Non-cacheable.
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* Called before HAL_PCD_Init() so the region is active before the USB
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* hardware ever touches the buffers.
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*/
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extern void * const usb_nc_buf_base; /* defined in usbd_cdc_if.c */
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static void USB_NC_MPU_Config(void)
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{
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MPU_Region_InitTypeDef r = {0};
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HAL_MPU_Disable();
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r.Enable = MPU_REGION_ENABLE;
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r.Number = MPU_REGION_NUMBER0;
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r.BaseAddress = (uint32_t)usb_nc_buf_base;
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r.Size = MPU_REGION_SIZE_512B;
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r.SubRegionDisable = 0x00;
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r.TypeExtField = MPU_TEX_LEVEL1; /* TEX=1 */
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r.AccessPermission = MPU_REGION_FULL_ACCESS;
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r.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
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r.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
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r.IsCacheable = MPU_ACCESS_NOT_CACHEABLE; /* C=0 */
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r.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; /* B=0 */
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HAL_MPU_ConfigRegion(&r);
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HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
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}
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PCD_HandleTypeDef hpcd;
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PCD_HandleTypeDef hpcd;
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void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd)
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void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd)
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@ -95,7 +68,6 @@ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
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hpcd.pData = pdev;
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hpcd.pData = pdev;
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pdev->pData = &hpcd;
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pdev->pData = &hpcd;
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USB_NC_MPU_Config(); /* Mark USB buffers non-cacheable before USB hardware init */
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HAL_PCD_Init(&hpcd);
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HAL_PCD_Init(&hpcd);
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HAL_PCDEx_SetRxFiFo(&hpcd, 0x80);
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HAL_PCDEx_SetRxFiFo(&hpcd, 0x80);
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19
src/crsf.c
19
src/crsf.c
@ -1,19 +0,0 @@
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/*
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* crsf.c — CRSF RC receiver stub (UART not yet wired on MAMBA F722S).
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* crsf_state.last_rx_ms stays 0 so safety_rc_alive() always returns false,
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* which keeps USB-only mode active (RC timeout disarm is commented out in main.c).
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*/
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#include "crsf.h"
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volatile CRSFState crsf_state = {0};
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void crsf_init(void) {}
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void crsf_parse_byte(uint8_t byte) { (void)byte; }
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int16_t crsf_to_range(uint16_t val, int16_t min, int16_t max)
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{
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/* CRSF range 172-1811 → linear map to [min, max] */
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int32_t v = (int32_t)val;
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return (int16_t)(min + (v - 172) * (max - min) / (1811 - 172));
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}
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18
src/main.c
18
src/main.c
@ -90,7 +90,7 @@ void SysTick_Handler(void) { HAL_IncTick(); }
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int main(void) {
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int main(void) {
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SCB_EnableICache();
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SCB_EnableICache();
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/* DCache stays ON — MPU Region 0 in usbd_conf.c marks USB buffers non-cacheable. */
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SCB_DisableDCache(); /* Must be off before USB starts — STM32F7 DCache/USB coherency */
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checkForBootloader(); /* Check RTC magic BEFORE HAL_Init — must be first thing */
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checkForBootloader(); /* Check RTC magic BEFORE HAL_Init — must be first thing */
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HAL_Init();
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HAL_Init();
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SystemClock_Config();
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SystemClock_Config();
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@ -104,6 +104,14 @@ int main(void) {
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status_init();
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status_init();
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HAL_Delay(3000); /* Wait for USB host to enumerate */
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HAL_Delay(3000); /* Wait for USB host to enumerate */
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/*
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* IWDG starts after the USB enumeration delay — avoids spurious reset
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* during the 3s startup hold. Once started, safety_refresh() MUST be
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* called at least every WATCHDOG_TIMEOUT_MS (50ms) or MCU resets.
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* IWDG cannot be stopped once started (hardware enforced).
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*/
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safety_init();
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/* Init IMU (MPU6000 via SPI1 — mpu6000.c wraps icm42688 + complementary filter) */
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/* Init IMU (MPU6000 via SPI1 — mpu6000.c wraps icm42688 + complementary filter) */
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int imu_ret = mpu6000_init() ? 0 : -1;
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int imu_ret = mpu6000_init() ? 0 : -1;
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@ -114,14 +122,6 @@ int main(void) {
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balance_t bal;
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balance_t bal;
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balance_init(&bal);
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balance_init(&bal);
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/*
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* IWDG starts AFTER all peripheral inits — avoids reset during mpu6000_init()
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* which takes ~510ms (well above the 50ms WATCHDOG_TIMEOUT_MS).
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* Once started, safety_refresh() MUST be called every WATCHDOG_TIMEOUT_MS
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* or MCU resets. IWDG cannot be stopped once started (hardware enforced).
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*/
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safety_init();
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char buf[256];
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char buf[256];
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int len;
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int len;
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@ -16,9 +16,8 @@
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/* IWDG prescaler 32 → LSI(40kHz)/32 = 1250 ticks/sec → 0.8ms/tick */
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/* IWDG prescaler 32 → LSI(40kHz)/32 = 1250 ticks/sec → 0.8ms/tick */
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#define IWDG_PRESCALER IWDG_PRESCALER_32
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#define IWDG_PRESCALER IWDG_PRESCALER_32
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/* Integer formula: timeout_ms * LSI_HZ / (prescaler * 1000)
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#define IWDG_TICK_MS (32.0f / 40.0f) /* 0.8ms per tick */
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* = WATCHDOG_TIMEOUT_MS * 40000 / (32 * 1000) = WATCHDOG_TIMEOUT_MS * 40 / 32 */
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#define IWDG_RELOAD ((uint32_t)(WATCHDOG_TIMEOUT_MS / IWDG_TICK_MS))
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#define IWDG_RELOAD (WATCHDOG_TIMEOUT_MS * 40UL / 32UL)
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#if IWDG_RELOAD > 4095
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#if IWDG_RELOAD > 4095
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# error "WATCHDOG_TIMEOUT_MS too large for IWDG_PRESCALER_32 — increase prescaler"
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# error "WATCHDOG_TIMEOUT_MS too large for IWDG_PRESCALER_32 — increase prescaler"
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