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Carrier PCB and BOM
blue edited this page 2026-06-11 15:02:38 -04:00

Resound — Carrier PCB Design & BOM

Rev A (design-for-layout). Target fab JLCPCB, 4-layer 1.6 mm. Module: ESP32-WROOM-32E (SMD castellated). Schematic-level netlist + layout plan + BOM — not Gerbers.

0. Intent — ONE PCB, two assembly variants (SINK vs BROADCASTER)

Same copper/BOM skeleton; differences: (a) which 3 GPIOs route to the I2S 0R jumper field, (b) address-strap resistors, (c) I2C pull-ups + LED parts populated on one board only.

I2S pin map: SINK BCK=5/WS=25/DATA=23; BROADCASTER BCK=19/WS=18/DATA=22. Because the roles use different GPIOs for the same bus nets, route I2S to a 3-position 0R jumper field (SINK column vs BROADCASTER column) — the key "one PCB, two roles" trick.

1. Netlist highlights (WROOM-32E)

Net GPIO Notes
I2S (sink) 5/25/23 strapping pin 5: pull-up, driven post-boot
I2S (broadcaster) 19/18/22
I2C SDA/SCL 32/33 RTC-domain, safe
UART2 TX/RX 17/16 inter-module aux
LED (APA102: DATA+CLK over SPI — see LED page; revised from WS2812)
Address straps 13/14/27/26 safe non-strapping pins; 0R/10k to GND/3V3
Prog UART0 TX=1/RX=3 6-pin header
GPIO12 (MTDI) leave floating must NOT be high at boot
GPIO6-11 RESERVED internal flash — do not route
  • Power/decoupling: rails arrive on stacking connector (+5V/+3V3/GND). 22 uF on 3V3 + 10 uF on 5V at entry; 2x 100 nF at the WROOM 3V3 pad + 10 uF local (BT TX peaks ~500 mA -> avoid brownout reset). EN: 10k pull-up + 1 uF (RC reset). IO0: 10k + 100 nF + button.
  • I2C pull-ups: 4.7k to 3V3 footprints on every board but DNP except one (the SINK). 2.2k fallback footprint.
  • Reset/boot buttons (tactile, board edge). Programming: 6-pin 2.54 header (GND/5V/RX/TX/DTR/RTS) + 2-transistor auto-reset/boot circuit (MMBT3904 x2) so a CP2102/CH340 cable flashes hands-free; + test pads fallback.
  • Stacking connector: use the 26-pin 2.54 mm pass-through from the connector page (this PCB's earlier 2x10/2.0mm was a placeholder). Top + bottom mirrored footprints = straight vertical bus column. Grounds interleaved beside I2S/LED.

2. HUD integration (ESP32-S3-Touch-LCD-1.28)

HUD is a self-contained S3 board + round LCD + onboard touch/IMU; it is an I2C peer running the UI firmware, not a dumb display. Carrier feeds it power + shared I2C via a 6-pin SH1.0 socket (J_HUD, populate on top carrier only):

J_HUD HUD signal Carrier net
1 VSYS (5V) +5V
2 GND GND
3 GPIO15 I2C_SDA
4 GPIO16 I2C_SCL
5 GPIO17 SPARE (opt IRQ/sync)
6 GPIO18 n/c

Power HUD from 5V (its onboard LDO makes 3V3 — don't also feed 3V3). Verify SH1.0 pin order vs Waveshare silk before fab.

3. Layout plan

  • 45 x 45 mm, 4-layer (Sig / solid GND / power / Sig). 4-layer needed for clean 2.4 GHz BT, I2S edges, ground reference.
  • WROOM at one edge, antenna overhanging the board edge; 15 mm copper keep-out all layers under/around antenna.
  • 4x M3 corner standoffs (38x38 mm) carry the stack load; stacking connector centered; buttons/prog header on the opposite edge for access while stacked.
  • Antenna coupling is the #1 risk: three stacked WROOM antennas in ~45 mm will interfere -> overhang + rotate each board's orientation, or use WROOM-32UE (external IPEX) for inner boards.

4. BOM — one carrier (~$7 assembled, JLCPCB-style)

Ref Part Qty ~$
U1 ESP32-WROOM-32E-N8 1 3.50
J_STACK 26-pin 2.54 pass-through pair 1 ~0.8
J_PROG 1x6 2.54 header 1 0.05
J_HUD SH1.0 6-pin (top board) 1 0.10
J_LED APA102 out (DATA+CLK+5V+GND) 1 0.05
SW1/2 tactile RST/BOOT 2 0.06
Q1/Q2 MMBT3904 auto-prog 2 0.04
Caps 22u/10u bulk + 4x100n + 1u + couplers ~9 ~0.1
Res 2x10k (EN/IO0), 2x4.7k I2C (DNP), LED series, 3x0R I2S jumper, 4 addr straps, 2 auto-prog ~15 ~0.05
PCB 45x45 4-layer ENIG 1 ~1.20

Full stack (3 WROOM carriers + HUD) ~ $36 parts (excl. power/battery/speakers). Assembly variant table: SINK populates left I2S jumpers + I2C pull-ups + auto-prog; BROADCASTER populates right I2S jumpers + unique address straps; top broadcaster also populates J_HUD.

5. Open items for EE

  1. Confirm HUD SH1.0 pin sequence from Waveshare schematic.
  2. Match the 26-pin stacking connector footprint (per connector page).
  3. Antenna coupling in the stack (biggest risk) — overhang/rotate or WROOM-32UE inner boards.
  4. GPIO12 must stay low at boot.
  5. Recompute I2C pull-up for total bus capacitance (4.7k assumed, 2.2k fallback).

Sources

ESP32-WROOM-32E/32UE datasheet; ESP32 Hardware Design Guidelines (antenna keep-out); ESP32 strapping pins; esptool boot-mode; Waveshare ESP32-S3-Touch-LCD-1.28 wiki + Spotpear user guide.