diff --git a/esp32s3/balance/main/config.h b/esp32s3/balance/main/config.h
index 30d6015..3ed5f99 100644
--- a/esp32s3/balance/main/config.h
+++ b/esp32s3/balance/main/config.h
@@ -11,25 +11,21 @@
  * to IO2/IO1 when deploying this firmware.  See docs/SAUL-TEE-SYSTEM-REFERENCE.md.
  */
 
-/* ── Orin serial: CH343 USB-UART bridge (1a86:55d3 = /dev/ttyACM0 on Orin) ──
- * Physical path: Orin USB → CH343 → GPIO 43 (TX) / GPIO 44 (RX).
- * NOTE: lsusb on Orin shows ONLY CH343, not ESP32 native USB (303a:xxxx).
- * USB Serial/JTAG is console-only — it is not the Orin↔ESP32 data path.
- */
+/* ── Orin serial: USB Serial/JTAG (native USB, /dev/ttyACM0 on Orin) ── */
 #define ORIN_UART_PORT          UART_NUM_0
 #define ORIN_UART_BAUD          460800
-#define ORIN_UART_TX_GPIO       43      /* ESP32 → CH343 RXD */
-#define ORIN_UART_RX_GPIO       44      /* CH343 TXD → ESP32 */
+#define ORIN_UART_TX_GPIO       43      /* unused — Orin uses USB-CDC */
+#define ORIN_UART_RX_GPIO       44      /* unused — Orin uses USB-CDC */
 #define ORIN_UART_RX_BUF        1024
 #define ORIN_TX_QUEUE_DEPTH     16
 
-/* ── VESC CAN TWAI (SN65HVD230 target GPIO 2/1 per bd-66hx design) ──
- * HARDWARE NOTE: SN65HVD230 transceiver must be physically wired to GPIO 2
- * (TXD) and GPIO 1 (RXD). Old prototype wiring used GPIO 43/44 but those
- * pins are now committed to UART (CH343). Rewire required before CAN works.
- */
-#define VESC_CAN_TX_GPIO        2       /* ESP32 TWAI TX → SN65HVD230 TXD */
-#define VESC_CAN_RX_GPIO        1       /* SN65HVD230 RXD → ESP32 TWAI RX */
+/* ── Inter-board UART (ESP32 Balance ↔ ESP32 IO) ── */
+#define IO_UART_TX_GPIO         17
+#define IO_UART_RX_GPIO         18
+
+/* ── VESC CAN TWAI (SN65HVD230 on Waveshare header pins) ── */
+#define VESC_CAN_TX_GPIO        15      /* GPIO15 → SN65HVD230 TXD */
+#define VESC_CAN_RX_GPIO        16      /* GPIO16 ← SN65HVD230 RXD */
 #define VESC_CAN_RX_QUEUE       32
 
 /* VESC node IDs — matched to bd-wim1 TELEM_VESC_LEFT/RIGHT mapping */