diff --git a/esp32s3/balance/main/config.h b/esp32s3/balance/main/config.h
index a5856c1..6aabb93 100644
--- a/esp32s3/balance/main/config.h
+++ b/esp32s3/balance/main/config.h
@@ -1,40 +1,44 @@
 #pragma once
 
-/* ── ESP32-S3 BALANCE board — bd-66hx pin/config definitions ───────────────
+/* ── ESP32-S3 BALANCE board — Waveshare ESP32-S3-Touch-LCD-1.28 pinout ─────
  *
- * Hardware change from pre-bd-66hx design:
- *   Previously: IO43/IO44 = CAN SN65HVD230 (shared Orin+VESC bus via CANable2)
- *   After bd-66hx: IO43/IO44 = CH343 UART0 (Orin serial comms)
- *                  IO2/IO1   = CAN SN65HVD230 rewired (VESC-only bus)
+ * Orin comms:  CH343 USB-to-serial on UART0 (GPIO43/44) → /dev/ttyACM0 on Orin
+ * VESC CAN:    SN65HVD230 transceiver on GPIO15 (TX) / GPIO16 (RX)
+ * Display:     GC9A01 on SPI2 — BL=GPIO40, RST=GPIO12
  *
- * The SN65HVD230 transceiver physical wiring must be updated from IO43/44
- * to IO2/IO1 when deploying this firmware.  See docs/SAUL-TEE-SYSTEM-REFERENCE.md.
+ * GPIO2 is NOT used for CAN — it is free. Earlier versions had an erroneous
+ * conflict between DISP_BL (GPIO2) and VESC_CAN_TX (GPIO2); corrected here
+ * to match motor-test-firmware verified hardware layout (commit 8e66430).
  */
 
 /* ── Orin serial (CH343 USB-to-UART, 1a86:55d3 on Orin side) ── */
 #define ORIN_UART_PORT          UART_NUM_0
 #define ORIN_UART_BAUD          460800
-#define ORIN_UART_TX_GPIO       43      /* ESP32→CH343 RXD */
-#define ORIN_UART_RX_GPIO       44      /* CH343 TXD→ESP32 */
+#define ORIN_UART_TX_GPIO       43      /* ESP32 UART0 TX → CH343 RXD */
+#define ORIN_UART_RX_GPIO       44      /* CH343 TXD → ESP32 UART0 RX */
 #define ORIN_UART_RX_BUF        1024
 #define ORIN_TX_QUEUE_DEPTH     16
 
-/* ── VESC CAN TWAI (SN65HVD230 transceiver, rewired for bd-66hx) ── */
-#define VESC_CAN_TX_GPIO        2       /* ESP32 TWAI TX → SN65HVD230 TXD */
-#define VESC_CAN_RX_GPIO        1       /* SN65HVD230 RXD → ESP32 TWAI RX */
+/* ── Inter-board UART (ESP32 BALANCE ↔ ESP32 IO) ── */
+#define IO_UART_TX_GPIO         17
+#define IO_UART_RX_GPIO         18
+
+/* ── VESC CAN TWAI (SN65HVD230 on Waveshare header GPIO15/16) ── */
+#define VESC_CAN_TX_GPIO        15      /* ESP32 TWAI TX → SN65HVD230 TXD */
+#define VESC_CAN_RX_GPIO        16      /* SN65HVD230 RXD → ESP32 TWAI RX */
 #define VESC_CAN_RX_QUEUE       32
 
 /* VESC node IDs — matched to bd-wim1 TELEM_VESC_LEFT/RIGHT mapping */
 #define VESC_ID_A               56u     /* TELEM_VESC_LEFT  (0x81) */
 #define VESC_ID_B               68u     /* TELEM_VESC_RIGHT (0x82) */
 
-/* ── GC9A01 240×240 round display (Waveshare ESP32-S3-Touch-LCD-1.28) ── */
+/* ── GC9A01 240×240 round display (Waveshare ESP32-S3-Touch-LCD-1.28, SPI2) ── */
 #define DISP_DC_GPIO     8
 #define DISP_CS_GPIO     9
 #define DISP_SCK_GPIO   10
 #define DISP_MOSI_GPIO  11
-#define DISP_RST_GPIO   14
-#define DISP_BL_GPIO     2
+#define DISP_RST_GPIO   12
+#define DISP_BL_GPIO    40
 
 /* ── Safety / timing ── */
 #define HB_TIMEOUT_MS           500u    /* heartbeat watchdog: disarm if exceeded */